The High-speed Interface Design Based on PCIe of the Non-cooperative Receiver Verification Platform
Abstract
The data transfer rate of the non-cooperate receiver is demanded very high. This paper uses the Xilinx Virtex-6 Series board as the hardware platform to transfer data received and through the front-end processing to the PC, and verifies the modulation pattern recognition algorithms. In order to meet the design requirements, we selected PCI Express bus. This paper describes the high-speed interface design, including DMA module design, the driver and the like. After the experiment, the data rate of the system can reach 1633GB/s, fully meet the design requirements.
Keywords
Verification platform; PCIE; DMA
DOI
10.12783/dtetr/mcemic2016/9544
10.12783/dtetr/mcemic2016/9544
Refbacks
- There are currently no refbacks.